A System-On-A-Chip (SOC) is a type of integrated circuit (IC) that includes a microprocessor that operates in cooperation with other circuitry. Typically, the microprocessor executes program code and interacts with one or more function-specific circuits, e.g., that do not execute program code. In some cases, the SOC is formed of two or more dies within a single IC package. In other cases, the microprocessor and other circuitry are implemented on a single die. One example of an SOC includes a microprocessor and programmable circuitry. The programmable circuitry can be implemented using a field programmable gate array (FPGA) architecture.
An FPGA typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth. Each programmable tile includes both programmable interconnect circuitry and programmable logic circuitry. The programmable interconnect circuitry typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic circuitry implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect circuitry and programmable logic circuitry typically are programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA. The functionality of an FPGA, or an FPGA portion of an SOC, is controlled by data bits provided to the IC for that purpose. The data bits, often referred to as a “bitstream,” can be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
In some cases, a circuit design for an SOC is specified in programmatic form using a high level programming language (HLL) such as C or C++. For example, the circuit design can be specified as a C program or a C++ program. One or more portions of the HLL program are intended to execute as program code on the microprocessor of the SOC. One or more other portions the circuit design are selected for implementation as hardware in the programmable circuitry of the SOC.
A portion of the HLL circuit design selected for implementation within the programmable circuitry is said to be selected for “hardware acceleration.” The resulting hardware circuit design and/or physical circuitry corresponding to the portion of the HLL circuit design that is selected for hardware acceleration is referred to as a “hardware accelerator.” The portions of the HLL circuit design selected for hardware acceleration, being implemented as physical circuitry, are no longer executed as program code within the microprocessor when the circuit design is implemented within an actual SOC. Typically, computationally intensive functions are selected for hardware acceleration.
Synthesis tools that operate upon HLL circuit designs can generate a single hardware module (e.g., a hardware description) for the portion of the HLL circuit design that is selected for hardware acceleration. For the hardware accelerator to operate properly, however, data must be shared between the hardware accelerator and the microprocessor. The process of incorporating the hardware accelerator into the larger circuit design within the SOC is a time consuming and manual process that is subject to error.